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19-3973; Rev 0; 1/06
KIT ATION EVALU ABLE AVAIL
4.5V to 28V Input Current-Mode StepDown Controller with Adjustable Frequency
General Description Features
Operates from 4.5V to 28V Supply 1% FB Voltage Accuracy Over Temperature Adjustable Output Voltage Down to 0.7V or REFIN Adjustable Switching Frequency or External Synchronization from 200kHz to 1.2MHz 180 Phase-Shifted Clock Output Adjustable Overcurrent Limit Adjustable Foldback Current Limit Adjustable Slope Compensation Selectable Current-Limit Mode: Latch-Off or Automatic Recovery Monotonic Output-Voltage Rise at Startup Output Sources and Sinks Current Enable Input Power-OK (POK) Output Adjustable Soft-Start Independently Adjustable Overvoltage Protection
MAX8650
The MAX8650 synchronous PWM buck controller operates from a 4.5V to 28V input and generates an adjustable 0.7V to 5.5V output voltage at loads up to 25A. The MAX8650 uses a peak current-mode control architecture with an adjustable (200kHz to 1.2MHz) constant switching frequency and is externally synchronizable. The IC's current limit uses the inductor's DC resistance to improve efficiency or an external sense resistor for high accuracy. The current-limit threshold is adjusted with an external resistor. Foldback-type current limit can be implemented to reduce the power dissipation in overload or short-circuit conditions. Short-circuit protection is provided based on sensing the current in the low-side MOSFET. A reference input is provided for use with a high-accuracy external reference or for double-data-rate (DDR)-tracking applications. Monotonic prebiased startup is available for a safe-start in applications where the output capacitor may have an initial charge. This feature prevents the output from pulling low during startup, which is a common characteristic of conventional buck regulators. A 180 out-of-phase synchronization output is available for synchronizing with another converter.
Applications
Base Stations DDR Network and Telecom Power Modules Storage IBA Applications Servers
Pin Configuration appears at end of data sheet.
Ordering Information
PART MAX8650EEG+ TEMP RANGE -40C to +85C PIN-PACKAGE 24 QSOP PKG CODE E24-1
+Denotes lead-free package.
Typical Operating Circuit
R2 R1 SYNC ON EN OFF POK SYNCO 1 11 24 3 23 R3 22 21 C3 R4 C4 R5 20 16 19 18 R7 17 FSYNC EN POK SYNCO MAX8650EEG SCOMP ILIM2 REFIN VL SS IN ILIM1 AVL COMP CS+ FB CSOVP GND MODE BST DH 6 LX DL PGND 7 8 9 10 12 14 15 13 C11 C7 C8 C10 R9 C9 Q2 R8 C6 2 4 5 C2 L1 Q1 C5 D2 VIN 7V TO 28V C1
VOUT 0.7V TO 5.5V
R6
________________________________________________________________ Maxim Integrated Products
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
ABSOLUTE MAXIMUM RATINGS
IN, EN to GND ........................................................-0.3V to +30V BST to LX...............................................................-0.3V to +7.5V DH to LX ....................................................-0.3V to (VBST + 0.3V) LX to GND .................... -1V (-2.5V for < 50ns transient) to +30V DL to PGND.................................................-0.3V to (VVL + 0.3V) ILIM2, ILIM1, SYNCO, FSYNC, OVP, SCOMP to GND .....................................-0.3V to (VAVL + 0.3V) VL to PGND ...........................................................-0.3V to +7.5V AVL, FB, POK, COMP, SS, MODE, REFIN to GND .....-0.3V to +6V CS+, CS- to GND .....................................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V Continuous Power Dissipation (TA = +70C) 24-Pin QSOP (derate 9.5mW/C above +70C)..........762mW Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = 12V, VBST - VLX = 6.5V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Operating Input Voltage Range Quiescent Supply Current Shutdown Supply Current IIN + IVL + IAVL AVL Undervoltage-Lockout Trip Level Output Voltage Adjust Range VL Regulation Voltage VL Output Current AVL Regulation Voltage AVL Output Current SOFT-START SS Shutdown Resistance SS Soft-Start Current REFIN INPUT REFIN Dual ModeTM Threshold REFIN Input Bias Current REFIN Input Voltage Range VREFIN = 0.7V to 1.5V VAVL 1.0V -250 0 VAVL +250 1.5 V nA V From SS to GND, VEN = 0V VSS = 0.625V 18 20 23 100 28 A 5.5V < VVL < 7V, 1mA < ILOAD < 10mA VL = IN for VIN < 7V VFB = 0.75V, no switching EN = GND, VIN 28V EN = GND, VAVL = VVL = VIN = 5V VAVL rising, 3% typ hysteresis Minimum output voltage is limited by minimum duty cycle and external components 7V < VIN < 28V, 1mA < ILOAD < 40mA 3.90 0.7 6.0 40 4.900 10 4.975 5.050 6.5 4.15 CONDITIONS MIN 4.5 2 TYP MAX 28.0 3 10 32 4.40 5.5 7.0 UNITS V mA A V V V mA V mA
Dual Mode is a trademark of Maxim Integrated Products, Inc.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V, VBST - VLX = 6.5V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER ERROR AMPLIFIER REFIN = AVL FB Regulation Voltage VREFIN = 0.7V to 1.5V 0.693 0.7 0.707 VREFIN + 0.00375 160 100 50 +1.5 12 27.2 68.0 -42.5 -170 -90 -25 0 32.0 80.0 -50.0 -200 -120 36.8 92.0 -57.5 -230 -150 +25 5.5 V CONDITIONS MIN TYP MAX UNITS
MAX8650
VREFIN VREFIN 0.00375 70 110 20 5 -0.1
Transconductance COMP Shutdown Resistance FB Input Leakage Current FB Input Common-Mode Range CURRENT-SENSE AMPLIFIER Voltage Gain CURRENT LIMIT Peak Current-Limit Threshold (VCS+ - VCS-) Valley Current-Limit Threshold (VLX - VPGND) Negative Current-Limit Threshold CS+, CS- Input Current CS+, CS- Input Common-Mode Range SLOPE COMPENSATION VSCOMP = 2.5V Slope Compensation at Maximum Duty Cycle VSCOMP = 1.25V SCOMP = AVL SCOMP = GND, TA = 0C to +85C TA = -40C to +85C SCOMP High Threshold SCOMP Low Threshold SCOMP Adjustment Range SCOMP Input Leakage Current OSCILLATOR Switching Frequency Minimum Off-Time Minimum On-Time RFSYNC = 21.0k RFSYNC = 143k Measured at DH Measured at DH VSCOMP = 1.25V to 2.5V RILIM1 = 24k ILIM1 = AVL RILIM2 = 50k RILIM2 = 200k % of (typ) positive direction current limit (VLX - VPGND) VCS+ = VCS- = 0V or 5.5V VOUT = 0 to 5.5V, VCS+ - VCS- = 30mV From COMP to GND, VEN = 0V VFB = 0.7V
S nA V V/V
mV mV % A V
231.25 113.77 231.25 113.77 110.70 0.5 1.25
250.00 123.00 250.00 123.00 123.00
268.75 132.23 268.75 132.23 132.23 VAVL - 0.5 2.5 V V V nA mV
5 800 160 1000 200 235 75
200 1200 240 100
kHz ns ns
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V, VBST - VLX = 6.5V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER FSYNC Synchronization Range FSYNC Input-High Pulse Width FSYNC Input-Low Pulse Width FSYNC Rise/Fall Time SYNCO Phase Shift SYNCO Output Low Level SYNCO Output High Level FSYNC Pin Threshold for SYNC Mode FSYNC Input Low FSYNC Input High FET DRIVERS DH On-Resistance, High State DH On-Resistance, Low State DL On-Resistance, High State DL On-Resistance, Low State Break-Before-Make Dead Time LX, BST Leakage Current THERMAL PROTECTION Thermal Shutdown Thermal-Shutdown Hysteresis Rising temperature +160 15 C C VBST - VLX = 6.5V VBST - VLX = 5V VBST - VLX = 6.5V VBST - VLX = 5V VVL = 6.5V VVL = 5V VVL = 6.5V VVL = 5V Low side off to high side on, high side off to low side on VBST = 35V, VLX = 28V, VIN = 28V 1.13 1.4 1.0 1.3 1.6 1.7 0.8 0.85 20 1.8 2.2 2 2.2 2.5 2.8 1.5 1.5 30 5 ns A 2.5 ISYNCO = 5mA ISYNCO = 5mA VAVL 1V 1.7 2.5 0.4 180 0.4 CONDITIONS MIN 160 100 100 100 TYP MAX 1200 UNITS kHz ns ns ns Degrees V V V V V
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 12V, VBST - VLX = 6.5V, TA = -40C to +85C. Typical values are at TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER POK Power-OK Threshold POK Output Voltage, Low POK Leakage Current, High OVP REFIN = AVL OVP Threshold Voltage OVP Leakage Current, High MODE CONTROL MODE Logic-Level Low MODE Logic-Level High MODE Input Current SHUTDOWN CONTROL EN Logic-Level Low EN Logic-Level High EN Input Current 4.5V VAVL 5.5V 4.5V VAVL 5.5V VEN = 0V VEN = 28V 2 -1 1.5 +1 6.0 0.45 V V A 4.5V VAVL 5.5V 4.5V VAVL 5.5V VMODE = 0 to VAVL 1.8 -1 +1 0.4 V V A VREFIN = 0.7V to 1.5V VOVP = 0.8V 770 110 800 115 840 120 500 mV % of VREFIN nA REFIN = AVL, VFB rising, typical hysteresis is 3% VREFIN = 0.7V to 1.5V, VFB rising, typical hysteresis is 3% VFB = 0.6V, IPOK = 2mA VPOK = 5.5V 629.0 88.7 650.0 91.7 25 671.0 94.7 200 1 mV % of mV A CONDITIONS MIN TYP MAX UNITS
MAX8650
Note 1: Specifications are 100% production tested at TA = +85C. Limits over the operating temperature range are guaranteed by design.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
Typical Operating Characteristics
(Circuit of Figure 3, 500kHz switching, VIN = 17V, VOUT = 3.3V, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
MAX8650 toc01
EFFICIENCY vs. LOAD CURRENT (CIRCUIT OF FIGURE 4)
80 70 EFFICIENCY (%) 60 50 12V INPUT, 0.9V OUTPUT 40 30 20 10 0 12V INPUT, 1.25V OUTPUT
MAX8650 toc02
LOAD REGULATION
3.305 OUTPUT VOLTAGE (V) 3.300 3.295 3.290 3.285 3.280 3.275 3.270 0 5 10 LOAD CURRENT (A) 15
MAX8650 toc03
100 90 80 70 EFFICIENCY (%) 60 50 40 30 20 10 0 1 10 LOAD CURRENT (A) 12V INPUT, 3.3V OUTPUT 12V INPUT, 2.5V OUTPUT 12V INPUT, 1.8V OUTPUT 24V INPUT, 3.3V OUTPUT
90
3.310
100
1 LOAD CURRENT (A)
10
LINE REGULATION
MAX8650 toc04
RILIM1 vs. PEAK CURRENT LIMIT
55 50 RILIM1 (k) 45 40 35 30 25
MAX8650 toc05
OSCILLATOR FREQUENCY vs. INPUT VOLTAGE
MAX8650 toc06
3.310 3.305 OUTPUT VOLTAGE (V) 3.300 3.295 3.290 3.285 3.280 3.275 3.270 6 10 14 18 22 INPUT VOLTAGE (V) 26 15A LOAD NO LOAD
60
530 520 510 500 490 TA = +85C 480 470 TA = +25C TA = -40C
30
20 0.03
OSCILLATOR FREQUENCY (kHz)
0.04 0.05 0.06 0.07 PEAK CURRENT LIMIT VCS+ - VCS- (V)
0.08
6
10
14 18 22 INPUT VOLTAGE (V)
26
30
STEP-LOAD RESPONSE 7.5A TO 15A TO 7.5A
MAX8650 toc07
STEP-LOAD RESPONSE -8A TO 8A TO -8A (CIRCUIT OF FIGURE 4)
MAX8650 toc08
VOUT
VOUT 100mV/div (AC-COUPLED)
50mV/div (AC-COUPLED)
IOUT 5A/div 0V 40s/div
IOUT 0V 5A/div
100s/div
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
Typical Operating Characteristics (continued)
(Circuit of Figure 3, 500kHz switching, VIN = 17V, VOUT = 3.3V, TA = +25C, unless otherwise noted.)
MAX8650
POWER-UP WAVEFORMS
MAX8650 toc09
POWER-DOWN WAVEFORMS
MAX8650 toc10
ENABLE/SHUTDOWN WAVEFORMS
MAX8650 toc11
VPOK
5V/div 5V/div 1V/div
VPOK VIN
5V/div
VPOK
5V/div
VIN
VOUT
5V/div 0V
VEN
5V/div
VOUT
5A/div
IL 1V/div 0V 5A/div 0V 200s/div
VOUT IL
2V/div
IL 2ms/div
10A/div 0V 2ms/div
0V
SYNCHRONIZATION WAVEFORMS
MAX8650 toc12
SHORT CIRCUIT AND RECOVERY
MAX8650 toc13
OVERVOLTAGE PROTECTION
MAX8650 toc14
VFSYNC
5V/div VOUT
2V/div
VOUT
7.5A LOAD
1V/div 0V
VSYNCO
5V/div IL
10A/div
VDH
0V 10V/div 0V 5V/div 0V
VDH
10V/div
IIN
0V 10A/div 0V
VDL
1s/div
200s/div
40s/div
CLOSED-LOOP BODE PLOT WITH NO LOAD
MAX8650 toc15
CLOSED-LOOP BODE PLOT WITH 15A LOAD
MAX8650 toc16
GAIN
GAIN
0dB 10dB/div PHASE 0 30/div PHASE
0dB 10dB/div
0 30/div
1k
10k
100k
1M
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
Pin Description
PIN 1 NAME FSYNC FUNCTION Frequency Set and Synchronization. Connect a resistor from FSYNC to GND to set the switching frequency, or drive with an external clock signal between 160kHz and 1.2MHz. See the Switching Frequency and Synchronization section. Current-Limit Operating-Mode Selection. Connect MODE to AVL for latch-off current limit or connect MODE to GND for automatic-recovery current limit. Synchronization Output. Provides a clock output that is 180 out-of-phase with the internal oscillator for synchronizing another MAX8650. Boost Capacitor Connection. Connect a 0.1F ceramic capacitor from BST to LX. High-Side n-Channel MOSFET Gate-Driver Output. Connect DH to the gate of the high-side MOSFET. DH is internally pulled low in shutdown. External Inductor Connection Low-Side n-Channel MOSFET Gate-Driver Output. Connect DL to the gate of the low-side MOSFET (synchronous rectifier). DL is internally pulled low in shutdown. Power Ground. Connect PGND to the power ground plane and to the source of the low-side external MOSFET. The return path for both gate drivers is through PGND. Internal 6.5V Linear-Regulator Output. Connect a 1F to 10F ceramic capacitor from VL to ground. For VIN < 7V, connect VL directly to IN. VL powers both gate drivers. VL is the input to the AVL linear regulator. Input Supply Voltage. IN is the input to the VL linear regulator. Connect VL to IN for VIN < 7V. Enable. Apply logic-high to enable the output, or logic-low to put the controller in low-power shutdown mode. Connect EN to IN for always-on operation. Internal 5V Linear-Regulator Output. Connect a 1F ceramic capacitor from AVL to ground. AVL powers the MAX8650's internal circuits. Ground. Connect GND to the analog ground plane. Connect the analog ground and power ground planes at a single point near the IC. Low-current signals return to GND. Positive Differential Current-Sense Input Negative Differential Current-Sense Input Programmable Current-Limit Input for Inductor Current. Connect a resistor from ILIM1 to GND to set the peak current-limit threshold. ILIM1 sources 10A through the resistor, and the voltage at ILIM1 is attenuated 7.5:1 to set the final current limit. For example, a 60k resistor results in 600mV at ILIM1. This results in a current-limit threshold (VCS+ - VCS-) of 80mV. The ILIM1 resistor range is 24k to 60k. Connect ILIM1 to AVL to set the default current-limit threshold of 80mV.
2 3 4 5 6 7 8 9 10 11 12 13 14 15
MODE SYNCO BST DH LX DL PGND VL IN EN AVL GND CS+ CS-
16
ILIM1
8
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
Pin Description (continued)
PIN 17 NAME OVP FUNCTION Output Voltage Sensing for Overvoltage Protection. Connect OVP to the center of a resistor-divider from OUT to GND to set the FB independent output overvoltage trip point. Connect OVP to FB if this independence is not desired. The OVP threshold is 115% of the nominal FB regulation voltage. Feedback Input. Connect FB to the center of a resistor voltage-divider between the output and GND to set the output voltage. The FB threshold regulates at 0.7V or VREFIN. Loop Compensation. Connect COMP to an external RC network to compensate the loop. COMP is internally pulled to GND through 20 during shutdown. Soft-Start. Connect a 0.1F to 1F ceramic capacitor from SS to GND. This capacitor sets the softstart period during startup. SS is internally pulled to GND through 20 during shutdown. External Reference Input. Connect REFIN to AVL to use the internal 0.7V reference for the feedback threshold. Programmable Current-Limit Input for the Low-Side MOSFET (LX-PGND). Connect a resistor from ILIM2 to GND to set the valley current-limit threshold. ILIM2 sources 5A through the resistor, and the voltage at ILIM2 is attenuated 5:1 to set the final current limit. For example, a 50k resistor results in 250mV at ILIM2. This results in a current-limit threshold (VLX - VPGND) of 50mV. VILIM2 must not exceed 1V. Programmable Slope-Compensation Input. The slope-compensation voltage rate is the voltage at SCOMP times 0.1 divided by the oscillator period (T). Connect SCOMP to AVL or GND to set to the default of 250mV/T or 125mV/T, respectively. Open-Drain Output that Is High Impedance when the Output Voltage Rises Above 92% of the Nominal Regulation Value. POK pulls low during shutdown and when the output drops below 88% of the nominal regulation value.
MAX8650
18 19 20 21
FB COMP SS REFIN
22
ILIM2
23
SCOMP
24
POK
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
IN
MAX8650
6.5V LDO REGULATOR BST UVLO LEVEL SHIFT VL PWM CONTROL LOGIC DH LX
EN VL
THERMAL SHDN 5V AVL LDO VOLTAGE REFERENCE REF SELECT LOGIC REF SOFT-START CIRCUITRY OVP 1.15V REF ERROR AMP GM COMP CLAMP SLOPE COMP PWM COMPARATOR CSA 12 LEVEL SHIFT X1 CURRENTLIMIT CONTROL LOGIC CURRENTLIMIT COMP VL DIVIDE BY 5 10A VL OSCILLATOR
AVL
DL PGND
SYNCO
REFIN SS
FSYNC
FB COMP OVP CS+
SCOMP
5A
MODE ILIM2
CS-
POK ILIM1 GND DIVIDE BY 7.5 FB 0.92VREF
Figure 1. Functional Diagram
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
Detailed Description
DC-DC Converter Control Architecture
The MAX8650 step-down controller uses a PWM, current-mode control scheme. An internal transconductance amplifier establishes an integrated error voltage. The heart of the PWM controller is an open-loop comparator that compares the integrated voltage-feedback signal against the amplified current-sense signal plus the adjustable slope-compensation ramp, which are summed into the main PWM comparator to preserve inner-loop stability. At each rising edge of the internal clock, the high-side MOSFET turns on until the PWM comparator trips or the maximum duty cycle is reached. During this on-time, current ramps up through the inductor, storing energy in a magnetic field and sourcing current to the output. The current-mode feedback system regulates the peak inductor current as a function of the output-voltage error signal. The circuit acts as a switch-mode transconductance amplifier and pushes the output LC filter pole normally found in a voltage-mode PWM to a higher frequency. During the second half of the cycle, the high-side MOSFET turns off and the low-side MOSFET turns on. The inductor releases the stored energy as the current ramps down, providing current to the output. The output capacitor stores charge when the inductor current exceeds the required load current and discharges when the inductor current is lower, smoothing the voltage across the load. Under soft-overload conditions, when the peak inductor current exceeds the selected current limit (see the Current-Limit Circuit section), the high-side MOSFET is turned off immediately and the low-side MOSFET is turned on and remains on to let the inductor current ramp down until the next clock cycle. Under heavy-overload or short-circuit conditions, the valley foldback current limit is enabled to reduce power dissipation of external components. The MAX8650 operates in a forced-PWM mode. As a result, the controller maintains a constant switching frequency, regardless of load, to allow for easier filtering of the switching noise.
Undervoltage Lockout
When AVL drops below 4.03V, the MAX8650 assumes that the supply voltage is too low for proper operation, so the undervoltage-lockout (UVLO) circuitry inhibits switching and forces the DL and DH gate drivers low. When AVL rises above 4.15V, the controller enters the startup sequence and then resumes normal operation.
MAX8650
Startup and Soft-Start
The internal soft-start circuitry gradually ramps up the reference voltage to control the rate of rise of the stepdown controller's output and reduce input surge currents during startup. The soft-start period is determined by the value of the capacitor from SS to GND. The softstart time is approximately (30.4ms/F) x C SS . The MAX8650 also features monotonic output-voltage rise; therefore, both external power MOSFETs are kept off if the voltage at FB is higher than the voltage at SS. This allows the MAX8650 to start up into a prebiased output without pulling the output voltage down. Before the MAX8650 can begin the soft-start and powerup sequence, the following conditions must be met: * VAVL exceeds the 4.15V UVLO threshold. * EN is at logic-high. * The thermal limit is not exceeded.
Enable (EN)
The MAX8650 features a low-power shutdown mode. A logic-low at EN shuts down the controller. During shutdown, the output is high impedance, and both DH and DL are low. Shutdown reduces the quiescent current (IQ) to less than 10A. A logic-high at EN enables the controller.
Synchronous-Rectifier Driver (DL)
Synchronous rectification reduces conduction losses in the rectifier by replacing the normal Schottky catch diode with a low-resistance MOSFET switch. The MAX8650 also uses the synchronous rectifier to ensure proper startup of the boost gate-driver circuit and to provide the current-limit signal. The low-side gate driver (DL) swings from 0 to the 6.5V provided from VL. The DL waveform is always the complement of the DH highside gate-drive waveform (with controlled dead time to prevent cross-conduction or shoot-through). An adaptive dead-time circuit monitors the DL voltage and prevents the high-side MOSFET from turning on until DL is fully off. For the dead-time circuit to work properly, there must be a low-resistance, low-inductance path from the DL driver to the MOSFET gate. Otherwise, the sense circuitry in the MAX8650 can interpret the MOSFET gate as off when gate charge actually remains. Use very short, wide traces, approximately 10
11
Internal Linear Regulators
The MAX8650 contains two internal LDO regulators. The AVL regulator provides 5V for the IC's internal circuitry, and the VL regulator provides 6.5V for the MOSFET gate drivers. Connect a 4.7F ceramic capacitor from VL to PGND, and connect a 1F ceramic capacitor from AVL to GND. For applications where the input voltage is between 4.5V and 7V, connect VL directly to IN and connect a 10 resistor from VL to AVL.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
nents, mainly inductor and power MOSFETs, and upstream power source, when output is severely overloaded or short circuited and POK is low. Thus, the circuit can withstand short-circuit conditions continuously without causing overheating of any component. The peak constant-current limit sets the current-limit point more accurately since it does not have to suffer the wide variation of the low-side power MOSFET's on-resistance due to tolerance and temperature. The valley current is sensed across the on-resistance of the low-side MOSFET (VPGND - VLX). The valley current limit trips when the sensed voltage exceeds the valley current-limit threshold. The valley current limit recovers when the sensed voltage drops below the valley currentlimit threshold (except when using the latch-off option). Set the minimum valley current-limit threshold, when the output voltage is at the nominal regulated value, higher than the maximum peak current-limit setting. With this method, the current-limit point accuracy is controlled by the peak current limit and is not interfered with by the wide variation of MOSFET on-resistance. See the Setting the Current Limit section for how to set these limits. The MAX8650 can be configured for either an adjustable valley current-limit threshold with adjustable foldback ratio, or a fixed valley current limit that latches the converter off. When latch-off is used (MODE is connected to AVL), set the current-limit threshold by only one resistor from ILIM2 to GND and make sure this threshold is higher than the maximum output current required by at least a 20% margin. Cycle EN or input power to reset the current-limit latch. The peak current limit is used to sense the inductor current, and is more accurate than the valley current limit since it does not depend upon the on-resistance of the low-side MOSFET. The peak current can be measured across the resistance of the inductor for the highest efficiency, or alternatively, a current-sense resistor can be used for more accurate current sensing. A resistor connected from ILIM1 to GND sets the peak current-limit threshold. For more information on the current limit, see the Setting the Current Limit section.
VL BST DH MAX8650 LX N
DL
N
Figure 2. DH Boost Circuit
to 20 squares (50 mils to 100 mils wide if the MOSFET is 1in from the device) for the gate drive. The dead time at the other edge (DH turning off) also has an adaptive dead-time circuit operating in a similar manner. For both edges, there is an additional 20ns fixed dead time after the adaptive dead time expires.
High-Side Gate-Drive Supply (BST)
A flying capacitor boost circuit (Figure 2) generates the gate-drive voltage for the high-side n-channel MOSFET. The capacitor between BST and LX is charged from VL to 6.5V minus the diode forward-voltage drop while the low-side MOSFET is on. When the low-side MOSFET is switched off, the stored voltage of the capacitor is stacked above LX to provide the necessary turn-on voltage (VGS) for the high-side MOSFET. The controller then closes an internal switch between BST and DH to turn the high-side MOSFET on.
Current-Sense Amplifier
The current-sense circuit amplifies the differential current-sense voltage (VCS+ - VCS-). This amplified current-sense signal and the internal slope-compensation signal are summed (VSUM) together and fed into the PWM comparator's inverting input. The PWM comparator shuts off the high-side MOSFET when V SUM exceeds the integrated feedback voltage (VCOMP). The differential current sense is also used to provide peak inductor current limiting. This current limit is more accurate than the valley current limit, which is measured across the low-side MOSFET's on-resistance.
Switching Frequency and Synchronization
The MAX8650 has an adjustable internal oscillator that can be set to any frequency from 200kHz to 1.2MHz. To set the switching frequency, connect a resistor from FSYNC to GND. Calculate the resistor value from the following equation:
Current-Limit Circuit
The MAX8650 uses both foldback and peak current limiting (Figure 5). The valley foldback current limit is used to reduce power dissipation of external compo-
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
1 1k RFSYNC = - 162ns 2fS 16.34ns The MAX8650 can also be synchronized to an external clock by connecting the clock signal to FSYNC. In addition, SYNCO is provided to synchronize a second MAX8650 controller 180 out-of-phase with the first by connecting SYNCO of the first controller to FSYNC of the second. When the first controller is synchronized to an external clock, the external clock is inverted to generate SYNCO. Therefore, to get 180 out-of-phase operation, the clock input to the first controller should have a 50% duty cycle. of its nominal regulation voltage, POK is high impedance. When the output drops below 89% of its nominal regulation voltage, POK is internally pulled low. POK is also internally pulled low when the MAX8650 is shut down. To use POK as a logic-level signal, connect a pullup resistor from POK to the logic supply rail.
MAX8650
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation in the MAX8650. When the junction temperature exceeds +160C, an internal thermal sensor shuts down the device, allowing the IC to cool. The thermal sensor turns the IC on again after the junction temperature cools by 15C, resulting in a pulsed output during continuous thermal-overload conditions.
Power-Good Signal (POK)
POK is an open-drain output on the MAX8650 that monitors the output voltage. When the output is above 92%
VIN 10V TO 24V R1 R2 SYNC ON EN OFF POK SYNCO D1 1 11 24 3 23 R5 R6 C5 R13 C7 C8 R9 R10 R11 R12 17 GND OVP 13 18 FB CS15 C12 R8 22 21 20 16 19 FSYNC EN POK SYNCO SCOMP ILIM2 REFIN SS ILIM1 COMP MAX8650EEG MODE BST DH 6 LX DL 7 Q2 PGND VL IN AVL CS+ 8 9 10 12 14 C11 C13 C15 R15 C14 R14 C9B C10 2 4 5 C6 L1 Q1 C9A D2 C1 C2 C3 VOUT 3.3V/15A
Figure 3. Applications Circuit with 500kHz Switching, 10V to 24V Input, and 3.3V/15A Output ______________________________________________________________________________________ 13
4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
Table 1. Component List for Figure 3
COMPONENT C1, C2, C3 C5, C6 C7 C8 C9A, C9B C10, C14 C11 C12 C13, C15 D1 D2 L1 Q1 Q2 R1 R2 R3 R4 R5 R6 R8 R9, R11 R10, R12 R13 R14 R15 DESCRIPTION 10F, 25V X5R ceramic capacitors 0.1F, 10V X7R ceramic capacitors 220pF, 50V X7R ceramic capacitor Not installed 150F 20%, 4V, 7m ESR polymer aluminum electrolytic capacitors 0.47F 10%, 10V X5R ceramic capacitors 4.7F, 10V X5R ceramic capacitor 100pF, 25V C0G ceramic capacitor 1F, 16V X5R ceramic capacitors 100V, 200mA switching diode 30V, 100mA Schottky diode 1.2H, 18.2A, 2.6m max, 2.16m typ inductor 30V n-channel MOSFET 30V n-channel MOSFET 51.1k 1% resistor (0603) 100k 5% resistor (0603) 0 resistor Not installed 17.4k 1% resistor (0603) 130k 1% resistor (0603) 220k 5% resistor (0603) 7.5k 1% resistors (0603) 28.0k 1% resistors (0603) 39.2 1% resistor (0603) 2.4k 5% resistor (0603) 39.2k 5% resistor (0603) VENDOR/PART TDK C3225X5R1E106M (1210) Kemet C0603C104M9RAC (0603) TDK C1608X7R1H271K -- Panasonic EEFSDOG151R Taiyo Yuden LMK107BJ474KA (0603) TDK C2012X5R1A475M (0805) Kemet C603C101K3GAC (0603) TDK C1608X7R1C105M (0603) Central CMPD914 (SOT23) Central CMPSH-3 (SOT23) TOKO FDA1254-1R2M Fairchild FDS7296N3 Fairchild FDS7088SN3 -- -- -- -- -- -- -- -- -- -- -- -- QUANTITY 3 2 1 0 2 2 1 1 2 1 1 1 1 1 1 1 1 0 1 1 1 2 2 1 1 1
14
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
VIN 10.8V TO 13.2V R2 R1 SYNC ON EN OFF POK SYNCO D1 OPTIONAL 1 11 24 3 23 R5 R6 C3 VREFIN 0.9VDC R7 C6 C7 R9 R10 18 17 FB GND OVP R8 21 REFIN IN C4 20 16 19 SS AVL ILIM1 CS+ COMP CS10 12 14 15 C11 C12 C14 R12 C13 22 FSYNC EN POK SYNCO SCOMP ILIM2 MAX8650 MODE BST DH 6 LX DL 7 Q2 PGND VL 8 9 C10 R11 C9 2 4 5 C5 L1 Q1 C8A C8B C8C C8D D2 C1 C2 VOUT 0.9V 8A C8E
13
Figure 4. Applications Circuit with 400kHz Switching, 12V Input, and 0.9V 8A Output
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15
4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
Table 2. Component List for Figure 4
COMPONENT C1, C2 C3 C4, C5 C6 C7 C8A-C8E C9, C13 C10 C11 C12, C14 D1 D2 L1 Q1 Q2 R1 R2 R3 R4 R5 R6 R7 R8 R9, R10 R11 R12 DESCRIPTION 10F, 16V X5R ceramic capacitors (1210) 0.01F, 10V X7R ceramic capacitor (0603) 0.1F, 10V X7R ceramic capacitors 1800pF, 50V X7R ceramic capacitor X7% 22pF, 50V ceramic capacitor 680F/20%, 2.5V, 6m ESR capacitors, POS Al Lytic 10V 10%, 0.47F X5R ceramic capacitors (0603) 4.7F, 10V X5R ceramic capacitor (0805) 100pF, 25V ceramic capacitor (C0G) 1F, 16V X5R ceramic capacitors (0603) Diode, switching, 100V, 200mA 30V, 100mA diode Schottky 0.56H, 15A, 1.7m inductor 30V n-MOSFET, 8-pin SO 30V n-MOSFET, 8-pin SO 100k 5% resistor (0603) 66.5k 1% resistor (0603) 0 resistor Resistor, open 16.2k 1% resistor (0603) 35.7 k 1% resistor (0603) 15.8k 1% resistor (0603) 160k 5% resistor (0603) 10k 5% resistors (0603) 1.5k 5% resistor (0603) 1.1k 5% resistor (0603) VENDOR / PART Taiyo Yuden EMK325BJ106MN Kemet C0603C103M9RAC Kemet C0603C104M9RAC TDK C1608X7R1H182K TDK C1608C0G1H220K Sanyo 2R5TPD680M6 Taiyo Yuden LMK107BJ474KA TDK C2012X5R1A475M Kemet C0402C101K3GAC TDK C1608X7R1C105M Central/CMPD914 Central/CMPSH-3 Panasonic ETQPLR56WFC Vishay Si4346DY Vishay Si4362DY -- -- -- -- -- -- -- -- -- -- -- QUANTITY 2 1 2 1 1 5 2 1 1 2 1 1 1 1 1 1 1 1 0 1 1 1 1 2 1 1
Table 3. Suggested Components Manufacturers
MANUFACTURER Central Semiconductor Fairchild Semiconductor Panasonic Sumida Taiyo Yuden TDK Vishay COMPONENTS Diodes MOSFETs Capacitors Inductors Capacitors Capacitors MOSFETs PHONE 631-435-1110 972-910-8000 714-373-7939 847-545-6700 408-573-4150 847-803-6100 402-564-3131 WEBSITE www.centralsemi.com www.fairchildsemi.com www.panasonic.com www.sumida.com www.t-yuden.com www.component.tdk.com www.vishay.com
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
IPEAK AVL
INDUCTOR CURRENT
ILOAD
MAX8650
IVALLEY SCOMP
R4
R3
TIME
Figure 5. Inductor-Current Waveform
Figure 6. Resistor-Divider for Setting the Slope Compensation
Design Procedure
Setting the Output Voltage
To set the output voltage for the MAX8650, connect FB to the center of an external resistor-divider from the output to GND (R9 and R10 of Figure 3). Select R9 between 8k and 24k, and then calculate R10 with the following equation: V R10 = R9 x OUT - 1 VFB where VFB = 0.7V. R9 and R10 should be placed as close to the IC as possible.
For a slope compensation of 250mV/T, connect SCOMP to AVL. For applications with a duty cycle greater than 50%, set the SCOMP voltage with a resistor voltage-divider from AVL to GND (R3 and R4 in Figure 6). First, use the following equation to find the SCOMP voltage: V x 60 x RL VSCOMP = OUT fS x L where RL is the DC resistance of the inductor, and fS is the switching frequency. Next, select a value for R3, typically 10k, and solve for R4 as follows: R4 =
Setting the Output Overvoltage Protection Threshold
To set the overvoltage threshold voltage for the MAX8650, connect OVP to the center of an external resistor-divider from the output to GND (R11 and R12 of Figure 3). Select R11 between 8k and 24k, then calculate R12 with the following equation: V R12 = R11 x OUT - 1 VOVP where VOVP = 0.8V when using the internal reference. When using an external reference, VOVP is 115% of VREFIN.
(5V - VSCOMP ) x R3
VSCOMP
This sets the slope-compensation voltage rate to VSCOMP / (10 x T).
Inductor Selection
There are several parameters that must be examined when determining which inductor is to be used. Input voltage, output voltage, load current, switching frequency, and LIR. LIR is the ratio of inductor-current ripple to maximum DC load current. A higher LIR value allows for a smaller inductor, but results in higher losses and higher output ripple. A good compromise between size and efficiency is an LIR of 0.3. Once all the parameters are chosen, the inductor value is determined as follows: VOUT x (VIN - VOUT ) L= VIN x fS x ILOAD(MAX) x LIR
17
Setting the Slope Compensation
For most applications where the duty cycle is less than 50%, connect SCOMP to GND to set the slope compensation to the default of 125mV/T, where T is the oscillator period (T = 1 / fS).
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
where fS is the switching frequency. Choose a standardvalue inductor close to the calculated value. The exact inductor value is not critical and can be adjusted to make trade-offs between size, cost, and efficiency. Lower inductor values minimize size and cost, but they also increase the output ripple and reduce the efficiency due to higher peak currents. On the other hand, higher inductor values increase efficiency, but eventually resistive losses due to extra turns of wire exceed the benefit gained from lower AC current levels. This is especially true if the inductance is increased without also increasing the physical size of the inductor. Find a low-loss inductor with the lowest possible DC resistance that fits the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 300kHz. The chosen inductor's saturation current rating must exceed the peak inductor current determined as: IPEAK = ILOAD(MAX) + LIR 2 x ILOAD(MAX)
MAX8650
LX
OUT
MAX8650
ILIM2
RFOBK
RILIM2
Figure 7. ILIM2 Resistor Connections
Setting the Current Limit
Valley Current Limit The MAX8650 has an adjustable valley current limit, configurable for foldback with automatic recovery, or a constant-current limit with latchup. To set the current limit for foldback mode, connect a resistor from ILIM2 to the output (RFOBK), and another resistor from ILIM2 to GND (RILIM2). See Figure 7. The values of RFOBK and RILIM2 are calculated as follows: 1) First, select the percentage of foldback (PFB). This percentage corresponds to the current limit when VOUT equals zero, divided by the current limit when VOUT equals its nominal voltage. A typical value of PFB is in the 15% to 40% range. A lower value of PFB yields lower short-circuit current. The following equations are used to calculate RFOBK and RILIM2: RFOBK = PFB x VOUT 5A x 1 - PFB
2) If the resulting value of RILIM2 is negative, either increase PFB or choose a low-side MOSFET with a lower RDS(ON). The latter is preferred as it increases the efficiency and results in a lower short-circuit current. To set the constant-current limit for the latchup mode, only RILIM2 is used. The equation for RILIM2 below sets the current-limit threshold at 1.2 times the maximum rated output current: RILIM 2 = 1.2 x IVALLEY x RDS(ON) 1A
Similarly, IVALLEY is the value of the inductor valley current at maximum load and RDS(ON) is the maximum on-resistance of the low-side MOSFET at the highest operating junction temperature. Peak Current Limit The peak current-limit threshold (VTH) is set by a resistor connected from ILIM1 to GND. VTH corresponds to the peak voltage across the sensing element (inductor or current-sense resistor), RLIM1. RLIM1 is calculated as follows: 8 x VTH RILIM1 = 10A This allows a maximum DC output current (ILIM) of:
(
)
) ( )
RILIM 2 =
5 x RDS(ON) x IVALLEY x 1 - PFB x RFOBK VOUT - 5 x RDS(ON) x IVALLEY x 1 - PFB
(
ILIM =
VTH RDC
I - PK -PK 2
where IVALLEY is the value of the inductor valley current at maximum load (I LOAD(MAX) - 1/2 x I P-P ), and RDS(ON) is the maximum on-resistance of the low-side MOSFET at the highest operating junction temperature.
18
where RDC is either the DC resistance of the inductor or the value of the optional current-sense resistor. To ensure maximum output current, use the minimum value of VTH from each setting, and the maximum RDC values at the highest expected operating temperature.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
MAX8650
L1 LX R4 C9
VOUT
MAX8650
L1 LX R4
R3 VOUT
C9
CS+ CS-
R5
C13
R5 CS+ CS-
C13
Figure 8. Current Sense Using the Inductor's DC Resistance
Figure 9. Using a Current-Sense Resistor for Improved CurrentSense Accuracy
The DC resistance of the inductor's copper wire has a +0.22%/C temperature coefficient. To use the DC resistance of the output inductor for current sensing, an RC circuit is added (see Figure 8). The RC time constant is set at twice the inductor (L/RDC) time constant. Pick the value of C9 (typically 0.47F), then calculate the resistor value from R4 = 2L / (RDC x C9). Add a resistor (R5 in Figure 8) to the CS- connection to minimize input offset error. Calculate the value of R5 as follows: 1) When VOUT 2.4V: RILIM1 x 10A 20A + x R4 32k 20mA
2) Maximum drain-to-source voltage (VDSS): should be at least 20% higher than the input supply rail at the high-side MOSFET's drain. 3) Gate charges (QG, QGD, QGS): the lower, the better. For a 5V input application, choose the MOSFETs with rated RDS(ON) at VGS 4.5V. With higher input voltages, the internal VL regulator provides 6.5V for gate drive to minimize the on-resistance for a wide range of MOSFETs. For a good compromise between efficiency and cost, choose the high-side MOSFET (N1, N2) that has conduction losses equal to switching losses at nominal input voltage and output current. The selected low-side MOSFET (N3, N4) must have an RDS(ON) that satisfies the current-limit-setting condition above. Make sure that the low-side MOSFET does not spuriously turn on due to dV/dt caused by the high-side MOSFET turning on, as this would result in shoot-through current and degrade the efficiency. MOSFETs with a lower QGD/QGS ratio have higher immunity to dV/dt. For highcurrent applications, it is often preferable to parallel two MOSFETs rather than to use a single large MOSFET. For proper thermal-management design, the power dissipation must be calculated at the desired maximum operating junction temperature, maximum output current, and worst-case input voltage (for the low-side MOSFET, worst case is at VIN(MAX); for the high-side MOSFET, it could be either at VIN(MAX) or VIN(MIN)). The high-side and low-side MOSFETs have different loss components due to the circuit operation. The lowside MOSFET operates as a zero voltage switch; therefore, major losses are the channel-conduction loss (PLSCC) and the body-diode conduction loss (PLSDC).
R5 =
2) When VOUT < 2.4V: R5 = 15Ax R4 RILIM1 x 10A 15A + 32k
Capacitor C13 is connected in parallel with R5 and is equal in value to C9. The equivalent current-sense resistance when using an inductor for current sensing is equal to the DC resistance of the inductor (RDC).
MOSFET Selection
The MAX8650 drives two or four external, logic-level, nchannel MOSFETs as the circuit switch elements. The key selection parameters are: 1) On-resistance (RDS(ON)): the lower, the better.
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19
4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
V x RDS(ON) PLSCC = 1 - OUT x I2 VIN LOAD
ing junction temperature with the above calculated power dissipations. To reduce EMI caused by switching noise, add a 0.1F ceramic capacitor from the high-side switch drain to the low-side switch source or add resistors in series with DH and DL to slow down the switching transitions. However, adding series resistors increases the power dissipation of the MOSFET, so ensure this does not overheat the MOSFET.
Use RDS(ON) at TJ(MAX): PLSDC = 2 x ILOAD x VF x tDT x fS where VF is the body-diode forward-voltage drop, tDT is the dead time between high-side and low-side switching transitions (30ns typ), and fS is the switching frequency. The high-side MOSFET operates as a duty-cycle control switch and has the following major losses: the channel-conduction loss (PHSCC), the VL overlapping switching loss (PHSSW), and the drive loss (PHSDR). The high-side MOSFET does not have body-diode conduction loss, unless the converter is sinking current, when the loss due to body-diode conduction is calculated as PHSDC = 2 x ILOAD x VF x tDT x fS: V PHSCC = OUT x I2 x RDS(ON) LOAD VIN Use RDS(ON) at TJ(MAX): PHSSW = VIN x ILOAD x QGS + QGD IGATE x fS
Input Capacitor
The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on the input caused by the circuit's switching. The input capacitor must meet the ripple-current requirement (IRMS) imposed by the switching currents defined by the following equation:
IRMS = ILOAD VOUT x VIN - VOUT VIN
(
)
where IGATE is the average DH driver output-current capability determined by: IGATE 0.5 x VVL RDS(ON)(DR) + RGATE
I RMS has a maximum value when the input voltage equals twice the output voltage (VIN = 2 x VOUT), so IRMS(MAX) = ILOAD / 2. Ceramic capacitors are recommended due to their low ESR and ESL at high frequency with relatively low cost. Choose a capacitor that exhibits less than 10C temperature rise at the maximum operating RMS current for optimum long-term reliability. Ceramic capacitors with X5R or better temperature characteristics are recommended.
Output Capacitor
The key selection parameters for the output capacitor are the actual capacitance value, the equivalent series resistance (ESR), the equivalent series inductance (ESL), and the voltage-rating requirements. These parameters affect the overall stability, output voltage ripple, and transient response. The output ripple has three components: variations in the charge stored in the output capacitor, the voltage drop across the capacitor's ESR and ESL caused by the current into and out of the capacitor. The maximum output voltage ripple is estimated as follows: VRIPPLE = VRIPPLE(ESR) + VRIPPLE(C) + VRIPPLE(ESL) The output voltage ripple as a consequence of the ESR, ESL, and output capacitance is: VRIPPLE(ESR) = IP-P x ESR VIN L + ESL
where RDS(ON)(DR) is the high-side MOSFET driver's on-resistance (1.5 typ) and RGATE is the internal gate resistance of the MOSFET (~2): PHSDR = QG x VGS x fS x RGATE RGATE + RDS(ON)(DR)
where VGS VVL. In addition to the losses above, allow approximately 20% more for additional losses due to MOSFET output capacitances and low-side MOSFET body-diode reverse-recovery charge dissipated in the high-side MOSFET, but is not well defined in the MOSFET data sheet. Refer to the MOSFET data sheet for thermalresistance specifications to calculate the PC board area needed to maintain the desired maximum operat-
VRIPPLE(ESL) =
x ESL
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
VRIPPLE(C) = IP-P 8 x COUT x fS tor or the alternate series current-sense resistor to measure the inductor current. Current-mode control eliminates the double pole in the feedback loop caused by the inductor and output capacitor resulting in a smaller phase shift and requiring a less elaborate error-amplifier compensation than voltage-mode control. A simple single-series RC and CC is all that is needed to have a stable, high-bandwidth loop in applications where ceramic capacitors are used for output filtering. For other types of capacitors, due to the higher capacitance and ESR, the frequency of the zero created by the capacitance and ESR is lower than the desired closed-loop crossover frequency. To stabilize a nonceramic output capacitor loop, add another compensation capacitor from COMP to GND to cancel this ESR zero. The basic regulator loop is modeled as a power modulator, an output feedback-divider, and an error amplifier. The power modulator has DC gain set by gmc x RLOAD, with a pole and zero pair set by RLOAD, the output capacitor (COUT), and its ESR. Below are equations that define the power modulator: R xf xL GMOD(dc) = gmc x LOAD S RLOAD + fS x L where RLOAD = VOUT / IOUT(MAX), fS is the switching frequency, L is the output inductance, and gmc = 1 / (AVCS x RDC), where AVCS is the gain of the currentsense amplifier (12 typ), and RDC is the DC resistance of the inductor. Find the pole and zero frequencies created by the power modulator as follows: fpMOD = 1 R xf xL 2 x COUT x LOAD S + ESR RLOAD + fS x L fzMOD = 1 2 x COUT x ESR
MAX8650
where IP-P is the peak-to-peak inductor current: V - VOUT VOUT IP-P = IN x fS x L VIN These equations are suitable for initial capacitor selection, but final values should be chosen based on a prototype or evaluation circuit. As a general rule, a smaller current ripple results in less output-voltage ripple. Since the inductor ripple current is a factor of the inductor value and input voltage, the output-voltage ripple decreases with larger inductance, and increases with higher input voltages. Ceramic, tantalum, or aluminum polymer electrolytic capacitors are recommended. The aluminum electrolytic capacitor is the least expensive; however, it has higher ESR. To compensate for this, use a ceramic capacitor in parallel to reduce the switching ripple and noise. For reliable and safe operation, ensure that the capacitor's voltage and ripple-current ratings exceed the calculated values. The response to a load transient depends on the selected output capacitors. After a load transient, the output voltage instantly changes by ESR x I LOAD. Before the controller can respond, the output voltage deviates further, depending on the inductor and outputcapacitor values. After a short period (see the Typical Operating Characteristics), the controller responds by regulating the output voltage back to its nominal state. The controller response time depends on its closedloop bandwidth. With a higher bandwidth, the response time is faster, thus preventing the output voltage from further deviation from its regulating value.
Compensation Design
The MAX8650 uses an internal transconductance error amplifier whose output compensates the control loop. The external inductor, output capacitor, compensation resistor, and compensation capacitors determine the loop stability. The inductor and output capacitor are chosen based on performance, size, and cost. Additionally, the compensation resistor and capacitors are selected to optimize control-loop stability. The component values, shown in the circuits of Figures 3 and 4, yield stable operation over the given range of input-tooutput voltages. The controller uses a current-mode control scheme that regulates the output voltage by forcing the required current through the external inductor, so the MAX8650 uses the voltage drop across the DC resistance of the induc-
When COUT comprises "n" identical capacitors in parallel, the resulting COUT = n x COUT(EACH), and ESR = ESR(EACH) / n. Note that the capacitor zero for a parallel combination of like capacitors is the same as for an individual capacitor. See Figures 10 and 11 for illustrations of the pole and zero locations. The feedback voltage-divider has a gain of GFB = VFB / VOUT, where VFB is equal to 0.75V.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
GAIN (dB) POWER MODULATOR
CLOSE LOOP
CLOSE LOOP GAIN (dB) POWER MODULATOR ERROR AMP fC ERROR AMP
0dB fpMOD FB DIVIDER FREQUENCY
0dB fpMOD FB DIVIDER fzMOD fC FREQUENCY
fzMOD
Figure 10. Simplified Gain Plot for the fzMOD > fC Case
Figure 11. Simplified Gain Plot for the fzMOD < fC Case
The transconductance error amplifier has a DC gain, GEA(DC) = gmEA x RO, where gmEA is the error-amplifier transconductance, which is equal to 110S, RO is the output resistance of the error amplifier, which is 30M. A dominant pole is set by the compensation capacitor (CC), the amplifier output resistance (RO), and the compensation resistor (RC), and a zero is set by the compensation resistor (RC) and the compensation capacitor (CC). There is an optional pole set by CF and RC to cancel the output-capacitor ESR zero if it occurs near the crossover frequency (fC). Thus: fpdEA = 1 2 x CC x (RO + RC ) 1 2 x CC x RC 1 2 x CF x RC
For the case where fzMOD is greater than fC: GEA ( fc) = gmEA x RC GMOD( fc) = GMOD(dc) x Then RC can be calculated as: RC = VOUT gmEA x VFB x GMOD( fc) fpMOD fC
fzEA =
where gmEA = 110S. The error-amplifier compensation zero formed by RC and CC should be set at the modulator pole fpMOD. Calculate the value of CC as follows: R x f x L x COUT CC = LOAD S RLOAD + fS x L x RC
fpEA =
(
)
The crossover frequency, fC, should be much higher than the power-modulator pole fpMOD. Also, fC should be less than or equal to 1/5 the switching frequency. Select a value for fC in the range: 5 At the crossover frequency, the total loop gain must equal 1, and is expressed as: GEA ( fc) x GMOD( fc) x VFB VOUT =1 fpMOD << fC fS
If fzMOD is less than 5 x fC, add a second capacitor, CF, from COMP to GND. The value of CF is: CF = 1 2 x RC x fzMOD
As the load current decreases, the modulator pole also decreases; however, the modulator gain increases accordingly and the crossover frequency remains the same.
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
For the case where fzMOD is less than fC: The power modulator gain at fC is: GMOD( fc) = GMOD(dc) x The error-amplifier gain at fC is: f GEA ( fc) = gmEA x RC x zMOD fC RC is calculated as: V fC RC = OUT x VFB gmEA x GMOD( fc) x fzMOD where gmEA = 110S. CC is calculated from: CC = RLOAD x fS x L x COUT fpMOD fzMOD
=
MAX8650
fpMOD =
1 R xf xL 2 x COUT x LOAD S + ESR RLOAD + fS x L
1 3 -6 0.22 x (500 x 10 ) x 1.2 x 10 -6 2 x (300 x 10 ) x + 0.0035 0.22 + (500 x 103 ) x 1.2 x 10 -6
= 3.23kHz
f fpMOD << fC S 5 3.23kHz << fC 100kHz, select fC = 100kHz:
fzMOD = 1 2 x COUT x ESR = 1 2 x (300 x 10 -6 ) x 0.0035 = 152kHz
Since fzMOD > fC:
GMOD( fc) = GMOD(dc) x
RC = VOUT gmEA x VFB x GMOD( fc)
(RLOAD + fS x L) x RC
1 2 x RC x fzMOD
fpMOD fC
= 6.22 x
3230 100 x 103
= 0.201
CF is calculated from: CF =
=
Below is a numerical example to calculate RC and CC values of the typical operating circuit of Figure 3: AVCS = 12 L = 1.2H RDC = 2.16m fS = 500kHz gmc = 1 / (AVCS x RDC) = 1 / (12 x 0.00216) = 38.6S VOUT = 3.3V IOUT(MAX) = 15A RLOAD = VOUT / IOUT(MAX) = 3.3 / 15 = 0.22 COUT = 300F ESR = 3.5m
R xf xL GMOD(dc) = gmc x LOAD S RLOAD + fS x L = 38.6 x
3.3 = 199 k -6 110 x 10 x 0.7 x 0.201
Select the nearest standard value: RC = 200k:
R x f x L x COUT CC = LOAD S RLOAD + fS x L x RC = 0.22(500 x 103 ) x (1.2 x 10 -6 ) x (300 x 10 -6 ) = 241p 3 -6 3 0.22 + (500 x 10 ) x (1.2 x 10 ) x (200 x 10 )
(
)
Select the nearest standard value: CC = 270pF:
CF = 1 2 x RC x fzMOD = 1 2 x (200 x 103 ) x (152 x 103 ) = 5.2pF
0.22 x (500 x 103 ) x 1.2 x 10 -6
3
0.22 + (500 x 10 ) x 1.2 x 10 -6
= 6.22
Since the calculated value for CF is very small (close to the parasitic capacitance present at COMP), it is not necessary: R8 = RC = 200k C7 = CC = 270pF C8 = CF = Not installed
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4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency MAX8650
Applications Information
PC Board Layout Guidelines
Careful PC board layout is critical to achieve low switching losses and clean, stable operation. The switching power stage requires particular attention. Follow these guidelines for good PC board layout: 1) Place IC decoupling capacitors as close to IC pins as possible. Keep the power ground plane and signal ground plane separate. Place the input ceramic decoupling capacitor directly across and as close as possible to the high-side MOSFET's drain and the low-side MOSFET's source. This is to help contain the high switching current within this small loop. 2) For output current greater than 10A, a multilayer PC board is recommended. Pour a signal ground plane in the second layer underneath the IC to minimize noise coupling. 3) Connect input, output, and VL capacitors to the power ground plane; connect all other capacitors to the signal ground plane. 4) Place the inductor current-sense resistor and capacitor as close to the inductor as possible. Make a Kelvin connection to minimize the effect of PC board trace resistance. Place the input-bias balance resistor (R5 in Figures 8 and 9) near CS-. Run two closely parallel traces from across the capacitor (C9 in Figures 8 and 9) to CS+ and CS-. 5) Place the MOSFET as close as possible to the IC to minimize trace inductance of the gate-drive loop. If parallel MOSFETs are used, keep the trace lengths to both gates equal. 6) Connect the drain leads of the power MOSFET to a large copper area to help cool the device. Refer to the power MOSFET data sheet for recommended copper area. 7) Place the feedback and compensation components as close to the IC pins as possible. Connect the feedback resistor-divider from FB to the output as close as possible to the farthest output capacitor. 8) Refer to the MAX8650 evaluation kit for an example layout.
Chip Information
PROCESS: BiCMOS
Pin Configuration
TOP VIEW
FSYNC 1 MODE 2 SYNCO 3 BST 4 DH 5 LX 6 DL 7 PGND 8 VL 9 IN 10 EN 11 AVL 12 24 POK 23 SCOMP 22 ILIM2
MAX8650
21 REFIN 20 SS 19 COMP 18 FB 17 OVP 16 ILIM1 15 CS14 CS+ 13 GND
QSOP
24
______________________________________________________________________________________
4.5V to 28V Input Current-Mode Step-Down Controller with Adjustable Frequency
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX8650
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
21-0055
E
1 1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 25 (c) 2006 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
QSOP.EPS

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